Testing a JFET with a multimeter might seem to be a relatively easy task, seeing as how it has only one to test: either measured between gate and source, or between gate and drain. Testing continuity through the drain-source channel is another matter, though.

Remember from the last section how a stored charge across the capacitance of the gate-channel PN junction could hold the JFET in a pinched-off state without any external being applied across it? This can occur even when you’re holding the JFET in your hand to test it! Consequently, any meter reading of continuity through that channel will be unpredictable, since you don’t necessarily know if a charge is being stored by the gate-channel junction.

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Of course, if you know beforehand which terminals on the device are the gate, source, and drain, you may connect a jumper wire between gate and source to eliminate any stored charge and then proceed to test source-drain continuity with no problem. However, if you don’t know which terminals are which, the unpredictability of the source-drain connection may confuse your determination of terminal identity. A good strategy to follow when testing a JFET is to insert the pins of the transistor into anti-static foam (the material used to ship and store static-sensitive electronic components) just prior to testing.

The conductivity of the foam will make a resistive connection between all terminals of the transistor when it is inserted. Gsyncit serial number. This connection will ensure that all residual voltage built up across the gate-channel PN junction will be neutralized, thus “opening up” the channel for an accurate meter test of source-to-drain continuity. Since the JFET channel is a single, uninterrupted piece of semiconductor material, there is usually no difference between the source and drain terminals.

A check from source to drain should yield the same value as a check from drain to source. This resistance should be relatively low (a few hundred ohms at most) when the gate-source PN junction voltage is zero.

By applying a reverse-bias voltage between gate and source, pinch-off of the channel should be apparent by an increased resistance reading on the meter.

Features, Applications N-channel - TO-247 FDmeshTM Power MOSFET (with fast diode) High dv/dt and avalanche capabilities 100% Avalanche tested Low input capacitance and gate charge Low gate input resistancE Tight process control and high manufacturing yields The FDmeshTM associates all advantages of reduced on-resistance and fast switching with an intrinsic fast-recovery body diode. It is therefore strongly recommended for bridge topologies, in particular ZVS phase-shift converters. Applications Part number STP20NM60FD STW20NM60FD Marking P20NM60FD W20NM60FD Package TO-220 TO-247 Packaging Tube Value Parameter TO-220 Drain-source voltage (VGS = 0) Drain-gate voltage (RGS 20 k) Gate- source voltage Drain current (continuous) = 25°C Drain current (continuous) = 100°C Drain current (pulsed) Total dissipation = 25°C Derating factor TO-220FP Peak diode recovery voltage slope Insulation withstand voltage (DC) Operating junction temperature Storage temperature - 1. Limited only by maximum temperature allowed 2. Pulse width limited by safe operating area 3.